// ---------------------------------------------------------------------- // "THE BEER-WARE LICENSE" (Revision 42): // and wrote this // file. As long as you retain this notice you can do whatever you // want with this stuff. If we meet some day, and you think this // stuff is worth it, you can buy me a beer in return Yasunori // Osana and Akinobu Tomori at University of the Ryukyus, Japan. // ---------------------------------------------------------------------- // OpenFC project: an open FPGA accelerated cluster toolkit // Kyokko project: an open Multi-vendor Aurora 64B/66B-compatible link // // Modules in this file: // kcu1500_kyokko: Kyokko + Transceiver wrapper for KCU1500, 2x QSFP // ---------------------------------------------------------------------- `default_nettype none module kyokko_cb # ( parameter BondingCh=4 ) ( input wire CLK, CLK100, input wire [BondingCh-1:0] RXCLK, TXCLK, input wire [BondingCh-1:0] RXRST, TXRST, output wire CH_UP, // Rx signals input wire [BondingCh* 2-1:0] RXHDR, input wire [BondingCh*64-1:0] RXS, output wire [BondingCh -1:0] RXSLIP, RXPATH_RST, // Tx signals output wire [BondingCh* 2-1:0] TXHDR, output wire [BondingCh*64-1:0] TXS, // AXIS data input wire S_AXIS_TVALID, S_AXIS_TLAST, input wire [BondingCh*64-1:0] S_AXIS_TDATA, output wire S_AXIS_TREADY, output wire M_AXIS_TVALID, M_AXIS_TLAST, output wire [BondingCh*64-1:0] M_AXIS_TDATA, // UFC signals input wire UFC_REQ, input wire [7:0] UFC_MS, input wire S_AXIS_UFC_TVALID, input wire [BondingCh*64-1:0] S_AXIS_UFC_TDATA, output wire S_AXIS_UFC_TREADY, output wire M_AXIS_UFC_TVALID, M_AXIS_UFC_TLAST, output wire [BondingCh*64-1:0] M_AXIS_UFC_TDATA, // NFC signals input wire S_AXIS_NFC_TVALID, output wire S_AXIS_NFC_TREADY, input wire [15:0] S_AXIS_NFC_TDATA ); wire [BondingCh-1:0] LANE_UP, TX_WFR_CB, TX_SEND_CC, RX_ERR; // Channel Bonding signals wire [BondingCh-1:0] RX_IS_CB, FIFO_RE; wire [3:0] CB_STAT; wire [BondingCh-1:0] RX_STAT_TX_CB; wire [BondingCh-1:0] UFC_MODE; wire CB_TIMEOUT; // Data channel wire [BondingCh-1:0] M_AXIS_TVALIDi, M_AXIS_TLASTi, S_AXIS_TVALIDi, S_AXIS_TLASTi, S_AXIS_TREADYi; assign M_AXIS_TVALID = M_AXIS_TVALIDi[BondingCh-1]; assign M_AXIS_TLAST = M_AXIS_TLASTi [BondingCh-1]; assign S_AXIS_TVALIDi = { BondingCh{S_AXIS_TVALID} }; assign S_AXIS_TREADY = &S_AXIS_TREADYi; assign S_AXIS_TLASTi = { S_AXIS_TLAST, {BondingCh-1{1'b0}} }; // UFC channel wire [BondingCh-1:0] S_AXIS_UFC_TVALIDi, S_AXIS_UFC_TREADYi, M_AXIS_UFC_TVALIDi, M_AXIS_UFC_TLASTi; assign M_AXIS_UFC_TVALID = M_AXIS_UFC_TVALIDi[BondingCh-1]; assign M_AXIS_UFC_TLAST = M_AXIS_UFC_TLASTi [BondingCh-1]; assign S_AXIS_UFC_TVALIDi = { BondingCh{S_AXIS_UFC_TVALID} }; assign S_AXIS_UFC_TREADY = &S_AXIS_UFC_TREADYi; // NFC channel wire [BondingCh-1:0] S_AXIS_NFC_TREADYi; assign S_AXIS_NFC_TREADY = &S_AXIS_NFC_TREADYi; // Channel bonding & FIFO Synchronous readout control wire CB_RST = ~(|RX_STAT_TX_CB[3:0]); kyokko_rx_cb # (.BondingCh(BondingCh)) cb_init ( .CLK(TXCLK[0]), .RST(CB_RST), .RX_IS_CB(RX_IS_CB), .CB_STAT(CB_STAT), .FIFO_RE(FIFO_RE), .TIMEOUT(CB_TIMEOUT) ); wire [BondingCh-1:0] FIFO_EMPTY; reg FIFO_RE_SYNC; always @ (posedge TXCLK[0]) begin if (CB_RST | RXRST) begin FIFO_RE_SYNC <= 1; end else begin if ( &FIFO_EMPTY) FIFO_RE_SYNC <= 0; // stop reading on all empty if (&(~FIFO_EMPTY)) FIFO_RE_SYNC <= 1; // start reading on all valid end end // Rx reset on Rx error while link is UP wire RX_ERR_ANY = |RX_ERR; // Kyokko lane instances genvar ch; generate for (ch=0; ch