`default_nettype none module phy_10g_8ch_pd ( input wire PD_CLK, PD_RST, output wire [7:0] tx_dll_lock, input wire [7:0] reset, output wire [7:0] tx_ready, output wire [7:0] rx_ready, output wire [7:0] tx_pma_ready, output wire [7:0] rx_pma_ready, output wire [7:0] tx_serial_data, output wire [7:0] tx_serial_data_n, input wire [7:0] rx_serial_data, input wire [7:0] rx_serial_data_n, input wire pll_refclk0, output wire [7:0] rx_is_lockedtodata, output wire [7:0] rx_pmaif_fifo_underflow, input wire [7:0] rx_pmaif_bitslip, input wire [639:0] tx_parallel_data, output wire [639:0] rx_parallel_data, input wire [7:0] tx_coreclkin, input wire [7:0] rx_coreclkin, output wire [7:0] tx_clkout, output wire [7:0] tx_clkout2, output wire [7:0] rx_clkout, output wire [7:0] rx_clkout2, output wire [7:0] tx_fifo_full, output wire [7:0] tx_fifo_empty, output wire [7:0] tx_fifo_pfull, output wire [7:0] tx_fifo_pempty, output wire [7:0] rx_fifo_full, output wire [7:0] rx_fifo_empty, output wire [7:0] rx_fifo_pfull, output wire [7:0] rx_fifo_pempty, input wire [7:0] rx_fifo_rd_en, output wire [7:0] tx_enh_pmaif_fifo_almost_full, output wire [7:0] tx_enh_pmaif_fifo_almost_empty, output wire [7:0] tx_enh_pmaif_fifo_overflow, output wire [7:0] tx_enh_pmaif_fifo_underflow, output wire [7:0] rx_enh_pmaif_fifo_overflow ); xcvr u0 ( .clk_clk (PD_CLK),// I 1 .reset_reset (PD_RST),// I 1 .xcvrnphy_fme_0_tx_dll_lock_ch0_tx_dll_lock (tx_dll_lock[0]),// O 1 .xcvrnphy_fme_0_tx_dll_lock_ch1_tx_dll_lock (tx_dll_lock[1]),// O 1 .xcvrnphy_fme_0_tx_dll_lock_ch2_tx_dll_lock (tx_dll_lock[2]),// O 1 .xcvrnphy_fme_0_tx_dll_lock_ch3_tx_dll_lock (tx_dll_lock[3]),// O 1 .xcvrnphy_fme_0_tx_dll_lock_ch4_tx_dll_lock (tx_dll_lock[4]),// O 1 .xcvrnphy_fme_0_tx_dll_lock_ch5_tx_dll_lock (tx_dll_lock[5]),// O 1 .xcvrnphy_fme_0_tx_dll_lock_ch6_tx_dll_lock (tx_dll_lock[6]),// O 1 .xcvrnphy_fme_0_tx_dll_lock_ch7_tx_dll_lock (tx_dll_lock[7]),// O 1 .xcvrnphy_fme_0_reset_ch0_reset_ch0 (reset[0]),// I 1 .xcvrnphy_fme_0_reset_ch1_reset_ch1 (reset[1]),// I 1 .xcvrnphy_fme_0_reset_ch2_reset_ch2 (reset[2]),// I 1 .xcvrnphy_fme_0_reset_ch3_reset_ch3 (reset[3]),// I 1 .xcvrnphy_fme_0_reset_ch4_reset_ch4 (reset[4]),// I 1 .xcvrnphy_fme_0_reset_ch5_reset_ch5 (reset[5]),// I 1 .xcvrnphy_fme_0_reset_ch6_reset_ch6 (reset[6]),// I 1 .xcvrnphy_fme_0_reset_ch7_reset_ch7 (reset[7]),// I 1 .xcvrnphy_fme_0_tx_ready_ch0_tx_ready_ch0 (tx_ready[0]),// O 1 .xcvrnphy_fme_0_tx_ready_ch1_tx_ready_ch1 (tx_ready[1]),// O 1 .xcvrnphy_fme_0_tx_ready_ch2_tx_ready_ch2 (tx_ready[2]),// O 1 .xcvrnphy_fme_0_tx_ready_ch3_tx_ready_ch3 (tx_ready[3]),// O 1 .xcvrnphy_fme_0_tx_ready_ch4_tx_ready_ch4 (tx_ready[4]),// O 1 .xcvrnphy_fme_0_tx_ready_ch5_tx_ready_ch5 (tx_ready[5]),// O 1 .xcvrnphy_fme_0_tx_ready_ch6_tx_ready_ch6 (tx_ready[6]),// O 1 .xcvrnphy_fme_0_tx_ready_ch7_tx_ready_ch7 (tx_ready[7]),// O 1 .xcvrnphy_fme_0_rx_ready_ch0_rx_ready_ch0 (rx_ready[0]),// O 1 .xcvrnphy_fme_0_rx_ready_ch1_rx_ready_ch1 (rx_ready[1]),// O 1 .xcvrnphy_fme_0_rx_ready_ch2_rx_ready_ch2 (rx_ready[2]),// O 1 .xcvrnphy_fme_0_rx_ready_ch3_rx_ready_ch3 (rx_ready[3]),// O 1 .xcvrnphy_fme_0_rx_ready_ch4_rx_ready_ch4 (rx_ready[4]),// O 1 .xcvrnphy_fme_0_rx_ready_ch5_rx_ready_ch5 (rx_ready[5]),// O 1 .xcvrnphy_fme_0_rx_ready_ch6_rx_ready_ch6 (rx_ready[6]),// O 1 .xcvrnphy_fme_0_rx_ready_ch7_rx_ready_ch7 (rx_ready[7]),// O 1 .xcvrnphy_fme_0_tx_pma_ready_ch0_tx_pma_ready (tx_pma_ready[0]),// O 1 .xcvrnphy_fme_0_tx_pma_ready_ch1_tx_pma_ready (tx_pma_ready[1]),// O 1 .xcvrnphy_fme_0_tx_pma_ready_ch2_tx_pma_ready (tx_pma_ready[2]),// O 1 .xcvrnphy_fme_0_tx_pma_ready_ch3_tx_pma_ready (tx_pma_ready[3]),// O 1 .xcvrnphy_fme_0_tx_pma_ready_ch4_tx_pma_ready (tx_pma_ready[4]),// O 1 .xcvrnphy_fme_0_tx_pma_ready_ch5_tx_pma_ready (tx_pma_ready[5]),// O 1 .xcvrnphy_fme_0_tx_pma_ready_ch6_tx_pma_ready (tx_pma_ready[6]),// O 1 .xcvrnphy_fme_0_tx_pma_ready_ch7_tx_pma_ready (tx_pma_ready[7]),// O 1 .xcvrnphy_fme_0_rx_pma_ready_ch0_rx_pma_ready (rx_pma_ready[0]),// O 1 .xcvrnphy_fme_0_rx_pma_ready_ch1_rx_pma_ready (rx_pma_ready[1]),// O 1 .xcvrnphy_fme_0_rx_pma_ready_ch2_rx_pma_ready (rx_pma_ready[2]),// O 1 .xcvrnphy_fme_0_rx_pma_ready_ch3_rx_pma_ready (rx_pma_ready[3]),// O 1 .xcvrnphy_fme_0_rx_pma_ready_ch4_rx_pma_ready (rx_pma_ready[4]),// O 1 .xcvrnphy_fme_0_rx_pma_ready_ch5_rx_pma_ready (rx_pma_ready[5]),// O 1 .xcvrnphy_fme_0_rx_pma_ready_ch6_rx_pma_ready (rx_pma_ready[6]),// O 1 .xcvrnphy_fme_0_rx_pma_ready_ch7_rx_pma_ready (rx_pma_ready[7]),// O 1 .xcvrnphy_fme_0_tx_serial_data_ch0_tx_serial_data (tx_serial_data[0]),// O 1 .xcvrnphy_fme_0_tx_serial_data_ch1_tx_serial_data (tx_serial_data[1]),// O 1 .xcvrnphy_fme_0_tx_serial_data_ch2_tx_serial_data (tx_serial_data[2]),// O 1 .xcvrnphy_fme_0_tx_serial_data_ch3_tx_serial_data (tx_serial_data[3]),// O 1 .xcvrnphy_fme_0_tx_serial_data_ch4_tx_serial_data (tx_serial_data[4]),// O 1 .xcvrnphy_fme_0_tx_serial_data_ch5_tx_serial_data (tx_serial_data[5]),// O 1 .xcvrnphy_fme_0_tx_serial_data_ch6_tx_serial_data (tx_serial_data[6]),// O 1 .xcvrnphy_fme_0_tx_serial_data_ch7_tx_serial_data (tx_serial_data[7]),// O 1 .xcvrnphy_fme_0_tx_serial_data_n_ch0_tx_serial_data_n (tx_serial_data_n[0]),// O 1 .xcvrnphy_fme_0_tx_serial_data_n_ch1_tx_serial_data_n (tx_serial_data_n[1]),// O 1 .xcvrnphy_fme_0_tx_serial_data_n_ch2_tx_serial_data_n (tx_serial_data_n[2]),// O 1 .xcvrnphy_fme_0_tx_serial_data_n_ch3_tx_serial_data_n (tx_serial_data_n[3]),// O 1 .xcvrnphy_fme_0_tx_serial_data_n_ch4_tx_serial_data_n (tx_serial_data_n[4]),// O 1 .xcvrnphy_fme_0_tx_serial_data_n_ch5_tx_serial_data_n (tx_serial_data_n[5]),// O 1 .xcvrnphy_fme_0_tx_serial_data_n_ch6_tx_serial_data_n (tx_serial_data_n[6]),// O 1 .xcvrnphy_fme_0_tx_serial_data_n_ch7_tx_serial_data_n (tx_serial_data_n[7]),// O 1 .xcvrnphy_fme_0_rx_serial_data_ch0_rx_serial_data (rx_serial_data[0]),// I 1 .xcvrnphy_fme_0_rx_serial_data_ch1_rx_serial_data (rx_serial_data[1]),// I 1 .xcvrnphy_fme_0_rx_serial_data_ch2_rx_serial_data (rx_serial_data[2]),// I 1 .xcvrnphy_fme_0_rx_serial_data_ch3_rx_serial_data (rx_serial_data[3]),// I 1 .xcvrnphy_fme_0_rx_serial_data_ch4_rx_serial_data (rx_serial_data[4]),// I 1 .xcvrnphy_fme_0_rx_serial_data_ch5_rx_serial_data (rx_serial_data[5]),// I 1 .xcvrnphy_fme_0_rx_serial_data_ch6_rx_serial_data (rx_serial_data[6]),// I 1 .xcvrnphy_fme_0_rx_serial_data_ch7_rx_serial_data (rx_serial_data[7]),// I 1 .xcvrnphy_fme_0_rx_serial_data_n_ch0_rx_serial_data_n (rx_serial_data_n[0]),// I 1 .xcvrnphy_fme_0_rx_serial_data_n_ch1_rx_serial_data_n (rx_serial_data_n[1]),// I 1 .xcvrnphy_fme_0_rx_serial_data_n_ch2_rx_serial_data_n (rx_serial_data_n[2]),// I 1 .xcvrnphy_fme_0_rx_serial_data_n_ch3_rx_serial_data_n (rx_serial_data_n[3]),// I 1 .xcvrnphy_fme_0_rx_serial_data_n_ch4_rx_serial_data_n (rx_serial_data_n[4]),// I 1 .xcvrnphy_fme_0_rx_serial_data_n_ch5_rx_serial_data_n (rx_serial_data_n[5]),// I 1 .xcvrnphy_fme_0_rx_serial_data_n_ch6_rx_serial_data_n (rx_serial_data_n[6]),// I 1 .xcvrnphy_fme_0_rx_serial_data_n_ch7_rx_serial_data_n (rx_serial_data_n[7]),// I 1 .xcvrnphy_fme_0_pll_refclk0_clk (pll_refclk0),// I 1 .xcvrnphy_fme_0_rx_is_lockedtodata_ch0_rx_is_lockedtodata (rx_is_lockedtodata[0]),// O 1 .xcvrnphy_fme_0_rx_is_lockedtodata_ch1_rx_is_lockedtodata (rx_is_lockedtodata[1]),// O 1 .xcvrnphy_fme_0_rx_is_lockedtodata_ch2_rx_is_lockedtodata (rx_is_lockedtodata[2]),// O 1 .xcvrnphy_fme_0_rx_is_lockedtodata_ch3_rx_is_lockedtodata (rx_is_lockedtodata[3]),// O 1 .xcvrnphy_fme_0_rx_is_lockedtodata_ch4_rx_is_lockedtodata (rx_is_lockedtodata[4]),// O 1 .xcvrnphy_fme_0_rx_is_lockedtodata_ch5_rx_is_lockedtodata (rx_is_lockedtodata[5]),// O 1 .xcvrnphy_fme_0_rx_is_lockedtodata_ch6_rx_is_lockedtodata (rx_is_lockedtodata[6]),// O 1 .xcvrnphy_fme_0_rx_is_lockedtodata_ch7_rx_is_lockedtodata (rx_is_lockedtodata[7]),// O 1 .xcvrnphy_fme_0_rx_pmaif_fifo_underflow_ch0_rx_pmaif_fifo_underflow (rx_pmaif_fifo_underflow[0]),// O 1 .xcvrnphy_fme_0_rx_pmaif_fifo_underflow_ch1_rx_pmaif_fifo_underflow (rx_pmaif_fifo_underflow[1]),// O 1 .xcvrnphy_fme_0_rx_pmaif_fifo_underflow_ch2_rx_pmaif_fifo_underflow (rx_pmaif_fifo_underflow[2]),// O 1 .xcvrnphy_fme_0_rx_pmaif_fifo_underflow_ch3_rx_pmaif_fifo_underflow (rx_pmaif_fifo_underflow[3]),// O 1 .xcvrnphy_fme_0_rx_pmaif_fifo_underflow_ch4_rx_pmaif_fifo_underflow (rx_pmaif_fifo_underflow[4]),// O 1 .xcvrnphy_fme_0_rx_pmaif_fifo_underflow_ch5_rx_pmaif_fifo_underflow (rx_pmaif_fifo_underflow[5]),// O 1 .xcvrnphy_fme_0_rx_pmaif_fifo_underflow_ch6_rx_pmaif_fifo_underflow (rx_pmaif_fifo_underflow[6]),// O 1 .xcvrnphy_fme_0_rx_pmaif_fifo_underflow_ch7_rx_pmaif_fifo_underflow (rx_pmaif_fifo_underflow[7]),// O 1 .xcvrnphy_fme_0_rx_pmaif_bitslip_ch0_rx_pmaif_bitslip (rx_pmaif_bitslip[0]),// I 1 .xcvrnphy_fme_0_rx_pmaif_bitslip_ch1_rx_pmaif_bitslip (rx_pmaif_bitslip[1]),// I 1 .xcvrnphy_fme_0_rx_pmaif_bitslip_ch2_rx_pmaif_bitslip (rx_pmaif_bitslip[2]),// I 1 .xcvrnphy_fme_0_rx_pmaif_bitslip_ch3_rx_pmaif_bitslip (rx_pmaif_bitslip[3]),// I 1 .xcvrnphy_fme_0_rx_pmaif_bitslip_ch4_rx_pmaif_bitslip (rx_pmaif_bitslip[4]),// I 1 .xcvrnphy_fme_0_rx_pmaif_bitslip_ch5_rx_pmaif_bitslip (rx_pmaif_bitslip[5]),// I 1 .xcvrnphy_fme_0_rx_pmaif_bitslip_ch6_rx_pmaif_bitslip (rx_pmaif_bitslip[6]),// I 1 .xcvrnphy_fme_0_rx_pmaif_bitslip_ch7_rx_pmaif_bitslip (rx_pmaif_bitslip[7]),// I 1 .xcvrnphy_fme_0_tx_parallel_data_ch0_tx_parallel_data (tx_parallel_data[ 79: 0]),// I 80 .xcvrnphy_fme_0_tx_parallel_data_ch1_tx_parallel_data (tx_parallel_data[159: 80]),// I 80 .xcvrnphy_fme_0_tx_parallel_data_ch2_tx_parallel_data (tx_parallel_data[239:160]),// I 80 .xcvrnphy_fme_0_tx_parallel_data_ch3_tx_parallel_data (tx_parallel_data[319:240]),// I 80 .xcvrnphy_fme_0_tx_parallel_data_ch4_tx_parallel_data (tx_parallel_data[399:320]),// I 80 .xcvrnphy_fme_0_tx_parallel_data_ch5_tx_parallel_data (tx_parallel_data[479:400]),// I 80 .xcvrnphy_fme_0_tx_parallel_data_ch6_tx_parallel_data (tx_parallel_data[559:480]),// I 80 .xcvrnphy_fme_0_tx_parallel_data_ch7_tx_parallel_data (tx_parallel_data[639:560]),// I 80 .xcvrnphy_fme_0_rx_parallel_data_ch0_rx_parallel_data (rx_parallel_data[ 79: 0]),// O 80 .xcvrnphy_fme_0_rx_parallel_data_ch1_rx_parallel_data (rx_parallel_data[159: 80]),// O 80 .xcvrnphy_fme_0_rx_parallel_data_ch2_rx_parallel_data (rx_parallel_data[239:160]),// O 80 .xcvrnphy_fme_0_rx_parallel_data_ch3_rx_parallel_data (rx_parallel_data[319:240]),// O 80 .xcvrnphy_fme_0_rx_parallel_data_ch4_rx_parallel_data (rx_parallel_data[399:320]),// O 80 .xcvrnphy_fme_0_rx_parallel_data_ch5_rx_parallel_data (rx_parallel_data[479:400]),// O 80 .xcvrnphy_fme_0_rx_parallel_data_ch6_rx_parallel_data (rx_parallel_data[559:480]),// O 80 .xcvrnphy_fme_0_rx_parallel_data_ch7_rx_parallel_data (rx_parallel_data[639:560]),// O 80 .xcvrnphy_fme_0_tx_coreclkin_ch0_clk (tx_coreclkin[0]),// I 1 .xcvrnphy_fme_0_tx_coreclkin_ch1_clk (tx_coreclkin[1]),// I 1 .xcvrnphy_fme_0_tx_coreclkin_ch2_clk (tx_coreclkin[2]),// I 1 .xcvrnphy_fme_0_tx_coreclkin_ch3_clk (tx_coreclkin[3]),// I 1 .xcvrnphy_fme_0_tx_coreclkin_ch4_clk (tx_coreclkin[4]),// I 1 .xcvrnphy_fme_0_tx_coreclkin_ch5_clk (tx_coreclkin[5]),// I 1 .xcvrnphy_fme_0_tx_coreclkin_ch6_clk (tx_coreclkin[6]),// I 1 .xcvrnphy_fme_0_tx_coreclkin_ch7_clk (tx_coreclkin[7]),// I 1 .xcvrnphy_fme_0_rx_coreclkin_ch0_clk (rx_coreclkin[0]),// I 1 .xcvrnphy_fme_0_rx_coreclkin_ch1_clk (rx_coreclkin[1]),// I 1 .xcvrnphy_fme_0_rx_coreclkin_ch2_clk (rx_coreclkin[2]),// I 1 .xcvrnphy_fme_0_rx_coreclkin_ch3_clk (rx_coreclkin[3]),// I 1 .xcvrnphy_fme_0_rx_coreclkin_ch4_clk (rx_coreclkin[4]),// I 1 .xcvrnphy_fme_0_rx_coreclkin_ch5_clk (rx_coreclkin[5]),// I 1 .xcvrnphy_fme_0_rx_coreclkin_ch6_clk (rx_coreclkin[6]),// I 1 .xcvrnphy_fme_0_rx_coreclkin_ch7_clk (rx_coreclkin[7]),// I 1 .xcvrnphy_fme_0_tx_clkout_ch0_clk (tx_clkout[0]),// O 1 .xcvrnphy_fme_0_tx_clkout_ch1_clk (tx_clkout[1]),// O 1 .xcvrnphy_fme_0_tx_clkout_ch2_clk (tx_clkout[2]),// O 1 .xcvrnphy_fme_0_tx_clkout_ch3_clk (tx_clkout[3]),// O 1 .xcvrnphy_fme_0_tx_clkout_ch4_clk (tx_clkout[4]),// O 1 .xcvrnphy_fme_0_tx_clkout_ch5_clk (tx_clkout[5]),// O 1 .xcvrnphy_fme_0_tx_clkout_ch6_clk (tx_clkout[6]),// O 1 .xcvrnphy_fme_0_tx_clkout_ch7_clk (tx_clkout[7]),// O 1 .xcvrnphy_fme_0_tx_clkout2_ch0_clk (tx_clkout2[0]),// O 1 .xcvrnphy_fme_0_tx_clkout2_ch1_clk (tx_clkout2[1]),// O 1 .xcvrnphy_fme_0_tx_clkout2_ch2_clk (tx_clkout2[2]),// O 1 .xcvrnphy_fme_0_tx_clkout2_ch3_clk (tx_clkout2[3]),// O 1 .xcvrnphy_fme_0_tx_clkout2_ch4_clk (tx_clkout2[4]),// O 1 .xcvrnphy_fme_0_tx_clkout2_ch5_clk (tx_clkout2[5]),// O 1 .xcvrnphy_fme_0_tx_clkout2_ch6_clk (tx_clkout2[6]),// O 1 .xcvrnphy_fme_0_tx_clkout2_ch7_clk (tx_clkout2[7]),// O 1 .xcvrnphy_fme_0_rx_clkout_ch0_clk (rx_clkout[0]),// O 1 .xcvrnphy_fme_0_rx_clkout_ch1_clk (rx_clkout[1]),// O 1 .xcvrnphy_fme_0_rx_clkout_ch2_clk (rx_clkout[2]),// O 1 .xcvrnphy_fme_0_rx_clkout_ch3_clk (rx_clkout[3]),// O 1 .xcvrnphy_fme_0_rx_clkout_ch4_clk (rx_clkout[4]),// O 1 .xcvrnphy_fme_0_rx_clkout_ch5_clk (rx_clkout[5]),// O 1 .xcvrnphy_fme_0_rx_clkout_ch6_clk (rx_clkout[6]),// O 1 .xcvrnphy_fme_0_rx_clkout_ch7_clk (rx_clkout[7]),// O 1 .xcvrnphy_fme_0_rx_clkout2_ch0_clk (rx_clkout2[0]),// O 1 .xcvrnphy_fme_0_rx_clkout2_ch1_clk (rx_clkout2[1]),// O 1 .xcvrnphy_fme_0_rx_clkout2_ch2_clk (rx_clkout2[2]),// O 1 .xcvrnphy_fme_0_rx_clkout2_ch3_clk (rx_clkout2[3]),// O 1 .xcvrnphy_fme_0_rx_clkout2_ch4_clk (rx_clkout2[4]),// O 1 .xcvrnphy_fme_0_rx_clkout2_ch5_clk (rx_clkout2[5]),// O 1 .xcvrnphy_fme_0_rx_clkout2_ch6_clk (rx_clkout2[6]),// O 1 .xcvrnphy_fme_0_rx_clkout2_ch7_clk (rx_clkout2[7]),// O 1 .xcvrnphy_fme_0_tx_fifo_full_ch0_tx_fifo_full (tx_fifo_full[0]),// O 1 .xcvrnphy_fme_0_tx_fifo_full_ch1_tx_fifo_full (tx_fifo_full[1]),// O 1 .xcvrnphy_fme_0_tx_fifo_full_ch2_tx_fifo_full (tx_fifo_full[2]),// O 1 .xcvrnphy_fme_0_tx_fifo_full_ch3_tx_fifo_full (tx_fifo_full[3]),// O 1 .xcvrnphy_fme_0_tx_fifo_full_ch4_tx_fifo_full (tx_fifo_full[4]),// O 1 .xcvrnphy_fme_0_tx_fifo_full_ch5_tx_fifo_full (tx_fifo_full[5]),// O 1 .xcvrnphy_fme_0_tx_fifo_full_ch6_tx_fifo_full (tx_fifo_full[6]),// O 1 .xcvrnphy_fme_0_tx_fifo_full_ch7_tx_fifo_full (tx_fifo_full[7]),// O 1 .xcvrnphy_fme_0_tx_fifo_empty_ch0_tx_fifo_empty (tx_fifo_empty[0]),// O 1 .xcvrnphy_fme_0_tx_fifo_empty_ch1_tx_fifo_empty (tx_fifo_empty[1]),// O 1 .xcvrnphy_fme_0_tx_fifo_empty_ch2_tx_fifo_empty (tx_fifo_empty[2]),// O 1 .xcvrnphy_fme_0_tx_fifo_empty_ch3_tx_fifo_empty (tx_fifo_empty[3]),// O 1 .xcvrnphy_fme_0_tx_fifo_empty_ch4_tx_fifo_empty (tx_fifo_empty[4]),// O 1 .xcvrnphy_fme_0_tx_fifo_empty_ch5_tx_fifo_empty (tx_fifo_empty[5]),// O 1 .xcvrnphy_fme_0_tx_fifo_empty_ch6_tx_fifo_empty (tx_fifo_empty[6]),// O 1 .xcvrnphy_fme_0_tx_fifo_empty_ch7_tx_fifo_empty (tx_fifo_empty[7]),// O 1 .xcvrnphy_fme_0_tx_fifo_pfull_ch0_tx_fifo_pfull (tx_fifo_pfull[0]),// O 1 .xcvrnphy_fme_0_tx_fifo_pfull_ch1_tx_fifo_pfull (tx_fifo_pfull[1]),// O 1 .xcvrnphy_fme_0_tx_fifo_pfull_ch2_tx_fifo_pfull (tx_fifo_pfull[2]),// O 1 .xcvrnphy_fme_0_tx_fifo_pfull_ch3_tx_fifo_pfull (tx_fifo_pfull[3]),// O 1 .xcvrnphy_fme_0_tx_fifo_pfull_ch4_tx_fifo_pfull (tx_fifo_pfull[4]),// O 1 .xcvrnphy_fme_0_tx_fifo_pfull_ch5_tx_fifo_pfull (tx_fifo_pfull[5]),// O 1 .xcvrnphy_fme_0_tx_fifo_pfull_ch6_tx_fifo_pfull (tx_fifo_pfull[6]),// O 1 .xcvrnphy_fme_0_tx_fifo_pfull_ch7_tx_fifo_pfull (tx_fifo_pfull[7]),// O 1 .xcvrnphy_fme_0_tx_fifo_pempty_ch0_tx_fifo_pempty (tx_fifo_pempty[0]),// O 1 .xcvrnphy_fme_0_tx_fifo_pempty_ch1_tx_fifo_pempty (tx_fifo_pempty[1]),// O 1 .xcvrnphy_fme_0_tx_fifo_pempty_ch2_tx_fifo_pempty (tx_fifo_pempty[2]),// O 1 .xcvrnphy_fme_0_tx_fifo_pempty_ch3_tx_fifo_pempty (tx_fifo_pempty[3]),// O 1 .xcvrnphy_fme_0_tx_fifo_pempty_ch4_tx_fifo_pempty (tx_fifo_pempty[4]),// O 1 .xcvrnphy_fme_0_tx_fifo_pempty_ch5_tx_fifo_pempty (tx_fifo_pempty[5]),// O 1 .xcvrnphy_fme_0_tx_fifo_pempty_ch6_tx_fifo_pempty (tx_fifo_pempty[6]),// O 1 .xcvrnphy_fme_0_tx_fifo_pempty_ch7_tx_fifo_pempty (tx_fifo_pempty[7]),// O 1 .xcvrnphy_fme_0_rx_fifo_full_ch0_rx_fifo_full (rx_fifo_full[0]),// O 1 .xcvrnphy_fme_0_rx_fifo_full_ch1_rx_fifo_full (rx_fifo_full[1]),// O 1 .xcvrnphy_fme_0_rx_fifo_full_ch2_rx_fifo_full (rx_fifo_full[2]),// O 1 .xcvrnphy_fme_0_rx_fifo_full_ch3_rx_fifo_full (rx_fifo_full[3]),// O 1 .xcvrnphy_fme_0_rx_fifo_full_ch4_rx_fifo_full (rx_fifo_full[4]),// O 1 .xcvrnphy_fme_0_rx_fifo_full_ch5_rx_fifo_full (rx_fifo_full[5]),// O 1 .xcvrnphy_fme_0_rx_fifo_full_ch6_rx_fifo_full (rx_fifo_full[6]),// O 1 .xcvrnphy_fme_0_rx_fifo_full_ch7_rx_fifo_full (rx_fifo_full[7]),// O 1 .xcvrnphy_fme_0_rx_fifo_empty_ch0_rx_fifo_empty (rx_fifo_empty[0]),// O 1 .xcvrnphy_fme_0_rx_fifo_empty_ch1_rx_fifo_empty (rx_fifo_empty[1]),// O 1 .xcvrnphy_fme_0_rx_fifo_empty_ch2_rx_fifo_empty (rx_fifo_empty[2]),// O 1 .xcvrnphy_fme_0_rx_fifo_empty_ch3_rx_fifo_empty (rx_fifo_empty[3]),// O 1 .xcvrnphy_fme_0_rx_fifo_empty_ch4_rx_fifo_empty (rx_fifo_empty[4]),// O 1 .xcvrnphy_fme_0_rx_fifo_empty_ch5_rx_fifo_empty (rx_fifo_empty[5]),// O 1 .xcvrnphy_fme_0_rx_fifo_empty_ch6_rx_fifo_empty (rx_fifo_empty[6]),// O 1 .xcvrnphy_fme_0_rx_fifo_empty_ch7_rx_fifo_empty (rx_fifo_empty[7]),// O 1 .xcvrnphy_fme_0_rx_fifo_pfull_ch0_rx_fifo_pfull (rx_fifo_pfull[0]),// O 1 .xcvrnphy_fme_0_rx_fifo_pfull_ch1_rx_fifo_pfull (rx_fifo_pfull[1]),// O 1 .xcvrnphy_fme_0_rx_fifo_pfull_ch2_rx_fifo_pfull (rx_fifo_pfull[2]),// O 1 .xcvrnphy_fme_0_rx_fifo_pfull_ch3_rx_fifo_pfull (rx_fifo_pfull[3]),// O 1 .xcvrnphy_fme_0_rx_fifo_pfull_ch4_rx_fifo_pfull (rx_fifo_pfull[4]),// O 1 .xcvrnphy_fme_0_rx_fifo_pfull_ch5_rx_fifo_pfull (rx_fifo_pfull[5]),// O 1 .xcvrnphy_fme_0_rx_fifo_pfull_ch6_rx_fifo_pfull (rx_fifo_pfull[6]),// O 1 .xcvrnphy_fme_0_rx_fifo_pfull_ch7_rx_fifo_pfull (rx_fifo_pfull[7]),// O 1 .xcvrnphy_fme_0_rx_fifo_pempty_ch0_rx_fifo_pempty (rx_fifo_pempty[0]),// O 1 .xcvrnphy_fme_0_rx_fifo_pempty_ch1_rx_fifo_pempty (rx_fifo_pempty[1]),// O 1 .xcvrnphy_fme_0_rx_fifo_pempty_ch2_rx_fifo_pempty (rx_fifo_pempty[2]),// O 1 .xcvrnphy_fme_0_rx_fifo_pempty_ch3_rx_fifo_pempty (rx_fifo_pempty[3]),// O 1 .xcvrnphy_fme_0_rx_fifo_pempty_ch4_rx_fifo_pempty (rx_fifo_pempty[4]),// O 1 .xcvrnphy_fme_0_rx_fifo_pempty_ch5_rx_fifo_pempty (rx_fifo_pempty[5]),// O 1 .xcvrnphy_fme_0_rx_fifo_pempty_ch6_rx_fifo_pempty (rx_fifo_pempty[6]),// O 1 .xcvrnphy_fme_0_rx_fifo_pempty_ch7_rx_fifo_pempty (rx_fifo_pempty[7]),// O 1 .xcvrnphy_fme_0_rx_fifo_rd_en_ch0_rx_fifo_rd_en (rx_fifo_rd_en[0]),// I 1 .xcvrnphy_fme_0_rx_fifo_rd_en_ch1_rx_fifo_rd_en (rx_fifo_rd_en[1]),// I 1 .xcvrnphy_fme_0_rx_fifo_rd_en_ch2_rx_fifo_rd_en (rx_fifo_rd_en[2]),// I 1 .xcvrnphy_fme_0_rx_fifo_rd_en_ch3_rx_fifo_rd_en (rx_fifo_rd_en[3]),// I 1 .xcvrnphy_fme_0_rx_fifo_rd_en_ch4_rx_fifo_rd_en (rx_fifo_rd_en[4]),// I 1 .xcvrnphy_fme_0_rx_fifo_rd_en_ch5_rx_fifo_rd_en (rx_fifo_rd_en[5]),// I 1 .xcvrnphy_fme_0_rx_fifo_rd_en_ch6_rx_fifo_rd_en (rx_fifo_rd_en[6]),// I 1 .xcvrnphy_fme_0_rx_fifo_rd_en_ch7_rx_fifo_rd_en (rx_fifo_rd_en[7]),// I 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_full_ch0_tx_enh_pmaif_fifo_almost_full (tx_enh_pmaif_fifo_almost_full[0]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_full_ch1_tx_enh_pmaif_fifo_almost_full (tx_enh_pmaif_fifo_almost_full[1]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_full_ch2_tx_enh_pmaif_fifo_almost_full (tx_enh_pmaif_fifo_almost_full[2]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_full_ch3_tx_enh_pmaif_fifo_almost_full (tx_enh_pmaif_fifo_almost_full[3]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_full_ch4_tx_enh_pmaif_fifo_almost_full (tx_enh_pmaif_fifo_almost_full[4]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_full_ch5_tx_enh_pmaif_fifo_almost_full (tx_enh_pmaif_fifo_almost_full[5]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_full_ch6_tx_enh_pmaif_fifo_almost_full (tx_enh_pmaif_fifo_almost_full[6]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_full_ch7_tx_enh_pmaif_fifo_almost_full (tx_enh_pmaif_fifo_almost_full[7]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_empty_ch0_tx_enh_pmaif_fifo_almost_empty (tx_enh_pmaif_fifo_almost_empty[0]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_empty_ch1_tx_enh_pmaif_fifo_almost_empty (tx_enh_pmaif_fifo_almost_empty[1]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_empty_ch2_tx_enh_pmaif_fifo_almost_empty (tx_enh_pmaif_fifo_almost_empty[2]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_empty_ch3_tx_enh_pmaif_fifo_almost_empty (tx_enh_pmaif_fifo_almost_empty[3]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_empty_ch4_tx_enh_pmaif_fifo_almost_empty (tx_enh_pmaif_fifo_almost_empty[4]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_empty_ch5_tx_enh_pmaif_fifo_almost_empty (tx_enh_pmaif_fifo_almost_empty[5]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_empty_ch6_tx_enh_pmaif_fifo_almost_empty (tx_enh_pmaif_fifo_almost_empty[6]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_almost_empty_ch7_tx_enh_pmaif_fifo_almost_empty (tx_enh_pmaif_fifo_almost_empty[7]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_overflow_ch0_tx_enh_pmaif_fifo_overflow (tx_enh_pmaif_fifo_overflow[0]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_overflow_ch1_tx_enh_pmaif_fifo_overflow (tx_enh_pmaif_fifo_overflow[1]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_overflow_ch2_tx_enh_pmaif_fifo_overflow (tx_enh_pmaif_fifo_overflow[2]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_overflow_ch3_tx_enh_pmaif_fifo_overflow (tx_enh_pmaif_fifo_overflow[3]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_overflow_ch4_tx_enh_pmaif_fifo_overflow (tx_enh_pmaif_fifo_overflow[4]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_overflow_ch5_tx_enh_pmaif_fifo_overflow (tx_enh_pmaif_fifo_overflow[5]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_overflow_ch6_tx_enh_pmaif_fifo_overflow (tx_enh_pmaif_fifo_overflow[6]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_overflow_ch7_tx_enh_pmaif_fifo_overflow (tx_enh_pmaif_fifo_overflow[7]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_underflow_ch0_tx_enh_pmaif_fifo_underflow (tx_enh_pmaif_fifo_underflow[0]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_underflow_ch1_tx_enh_pmaif_fifo_underflow (tx_enh_pmaif_fifo_underflow[1]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_underflow_ch2_tx_enh_pmaif_fifo_underflow (tx_enh_pmaif_fifo_underflow[2]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_underflow_ch3_tx_enh_pmaif_fifo_underflow (tx_enh_pmaif_fifo_underflow[3]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_underflow_ch4_tx_enh_pmaif_fifo_underflow (tx_enh_pmaif_fifo_underflow[4]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_underflow_ch5_tx_enh_pmaif_fifo_underflow (tx_enh_pmaif_fifo_underflow[5]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_underflow_ch6_tx_enh_pmaif_fifo_underflow (tx_enh_pmaif_fifo_underflow[6]),// O 1 .xcvrnphy_fme_0_tx_enh_pmaif_fifo_underflow_ch7_tx_enh_pmaif_fifo_underflow (tx_enh_pmaif_fifo_underflow[7]),// O 1 .xcvrnphy_fme_0_rx_enh_pmaif_fifo_overflow_ch0_rx_enh_pmaif_fifo_overflow (rx_enh_pmaif_fifo_overflow[0]),// O 1 .xcvrnphy_fme_0_rx_enh_pmaif_fifo_overflow_ch1_rx_enh_pmaif_fifo_overflow (rx_enh_pmaif_fifo_overflow[1]),// O 1 .xcvrnphy_fme_0_rx_enh_pmaif_fifo_overflow_ch2_rx_enh_pmaif_fifo_overflow (rx_enh_pmaif_fifo_overflow[2]),// O 1 .xcvrnphy_fme_0_rx_enh_pmaif_fifo_overflow_ch3_rx_enh_pmaif_fifo_overflow (rx_enh_pmaif_fifo_overflow[3]),// O 1 .xcvrnphy_fme_0_rx_enh_pmaif_fifo_overflow_ch4_rx_enh_pmaif_fifo_overflow (rx_enh_pmaif_fifo_overflow[4]),// O 1 .xcvrnphy_fme_0_rx_enh_pmaif_fifo_overflow_ch5_rx_enh_pmaif_fifo_overflow (rx_enh_pmaif_fifo_overflow[5]),// O 1 .xcvrnphy_fme_0_rx_enh_pmaif_fifo_overflow_ch6_rx_enh_pmaif_fifo_overflow (rx_enh_pmaif_fifo_overflow[6]),// O 1 .xcvrnphy_fme_0_rx_enh_pmaif_fifo_overflow_ch7_rx_enh_pmaif_fifo_overflow (rx_enh_pmaif_fifo_overflow[7])// O 1 ); endmodule // phy_pd `default_nettype wire